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Disambiguation of "James, Rekha K."

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Delay-Reduced Combinational Logic Synthesis using Multiplexers.

, , , and . ESA, page 105-110. CSREA Press, (2006)

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Rekha Weber

Michael James

Audrein James

Katherine James

Rekha Sharma

 

Other publications of authors with the same name

Dual-mode RNS based programmable decimation filter for WCDMA and WLANa., , , , and . ISCAS, page 952-955. IEEE, (2008)Genetic Algorithm-Based Combinational Logic Synthesis Using Universal Logic Modules., , , and . ESA, page 210-215. CSREA Press, (2007)High Performance, Low Latency Double Digit Decimal Multiplier on ASIC and FPGA., , and . NaBIC, page 1445-1450. IEEE, (2009)Token based Detection and Neural Network based Reconstruction framework against code injection vulnerabilities., , and . J. Inf. Secur. Appl., (2018)Modelling and Impact Analysis of Push Back Attack in 3D Bufferless Network on Chip., , , and . MCSoC, page 426-432. IEEE, (2023)DoLaR: Double Layer Routing for Bufferless Mesh Network-on-Chip., , , , and . TENCON, page 400-405. IEEE, (2019)ELEMENT: Energy-Efficient Multi-NoP Architecture for IMC-Based 2.5-D Accelerator for DNN Training., , , , and . IEEE Des. Test, 40 (6): 51-63 (December 2023)Traffic aware routing in 3D NoC using interleaved asymmetric edge routers., , , and . Nano Commun. Networks, (2021)A New Look at Reversible Logic Implementation of Decimal Adder., , , and . SoC, page 1-4. IEEE, (2007)Fixed Point Decimal Multiplication Using RPS Algorithm., , , and . ISPA, page 343-350. IEEE Computer Society, (2008)