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Disambiguation of "de Oliveira, Duarte Lopes"

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Software-Defined Radio design based on GALS architecture for FPGAs.

, , , and . SBCCI, page 1-6. IEEE, (2016)

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Márcia Santos Duarte de Oliveira

Duarte Barroso Lopes

Vilma Duarte Oliveira

Silvia Oliveira Lopes

Ely de Oliveira

 

Other publications of authors with the same name

A novel state assignment method for XBM AFSMs without the essential hazard assumption., , , and . LASCAS, page 1-4. IEEE, (2018)A novel asynchronous interface with pausible clock for partitioned synchronous modules., , , and . LASCAS, page 1-4. IEEE, (2015)Implementation of Asynchronous Pipelines with QDI Template onto FPGAs Using Commercial Tools., , , and . SBCCI, page 1-5. IEEE, (2020)A novel fully-programmable analog fuzzifier architecture for interval type-2 fuzzy controllers using current steering mirrors., , , , and . J. Intell. Fuzzy Syst., 34 (1): 203-212 (2018)A novel approach for the design of low-power pipelined synchronous systems operating in double-edge of the clock., , , and . Microelectron. J., (2021)Design of Quasi Delay Insensitive Combinational Circuits Based on Optimized DIMS., , , and . LASCAS, page 1-4. IEEE, (2023)Miriã_SI: a tool for the synthesis of speed-independent multi burst-mode controllers., , and . SBCCI, page 56-61. ACM, (2005)A Novel Tool for Synthesis by Direct Mapping of Asynchronous Circuits from Extended STG Specifications., , , , and . VLSID, page 451-452. IEEE Computer Society, (2018)An Implementation of Extended Burst-Mode Specifications as Quasi Delay Insensitive State Machines., , , , , and . LASCAS, page 177-180. IEEE, (2019)Design of asynchronous systems on FPGA using direct mapping and synchronous specification., , , and . ReConFig, page 1-6. IEEE, (2013)