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NOISY: an electrical noise checker for ULSI.

, , , , и . ICCAD, стр. 226-229. IEEE Computer Society, (1988)

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Alain Schifferli

Alain Durocher

Alain Lory

Alain Schlichting

Alain Villard

 

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Multilevel logic optimization of very high complexity circuits., , , , и . EURO-DAC, стр. 14-19. IEEE Computer Society, (1994)GECOS : Mécanisme de synchronisation passant à l'échelle à plusieurs lecteurs et un écrivain pour structures chaînées., , , и . Technique et Science Informatiques, 34 (1-2): 53-78 (2015)A Redefinable Symbolic Simulation Technique to Testability Design Rules Checking., , , и . EDAC-ETC-EUROASIC, стр. 668. IEEE Computer Society, (1994)A Generic Architecture for On-Chip Packet-Switched Interconnections., и . DATE, стр. 250-256. IEEE Computer Society / ACM, (2000)STEPS: Experimenting a New Software-Based Strategy for Testing SoCs Containing P1500-Compliant IP Cores., , , , и . DATE, стр. 712-713. IEEE Computer Society, (2004)Protocol and Performance Analysis of the MPC Parallel Computer., , , , , , , , и . IPDPS, стр. 52. IEEE Computer Society, (2001)At-Speed Testing of Core-Based System-on-Chip Using an Embedded Micro-Tester., , и . VTS, стр. 447-454. IEEE Computer Society, (2007)Fully distributed initialization procedure for a 2D-Mesh NoC, including off-line BIST and partial deactivation of faulty components., , и . IOLTS, стр. 194-196. IEEE Computer Society, (2010)A portable clock multiplier generator using digital CMOS standard cells., , и . IEEE J. Solid State Circuits, 31 (7): 958-965 (1996)A High Performance Modular Embedded ROM Architecture., , и . ISCAS, стр. 1057-1060. IEEE, (1995)