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Disambiguation of "Jaiswal, Akhilesh"

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Image segmentation with stochastic magnetic tunnel junctions and spiking neurons.

, , , and . IJCNN, page 2460-2468. IEEE, (2017)

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Himjyot Jaiswal

jaiswal mamta

Rakesh Jaiswal

Atyansh Jaiswal

Manoj Kumar Jaiswal

 

Other publications of authors with the same name

MESL: Proposal for a Non-volatile Cascadable Magneto-Electric Spin Logic., and . CoRR, (2016)Proposal for a Leaky-Integrate-Fire Spiking Neuron based on Magneto-Electric Switching of Ferro-magnets., , , and . CoRR, (2016)Variation-aware Design Space Exploration of Mott Memristor-based Neuristors., , , , , and . ISVLSI, page 68-73. IEEE, (2022)Digital and Analog-Mixed-Signal In-Memory Processing in CMOS SRAM., , , , and . ACM Great Lakes Symposium on VLSI, page 371. ACM, (2019)Stochastic Switching of SHE-MTJ as a Natural Annealer for Efficient Combinatorial Optimization., , and . ICCD, page 605-608. IEEE Computer Society, (2017)Energy Efficient Neural Computing: A Study of Cross-Layer Approximations., , , , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 8 (4): 796-809 (2018)Xcel-RAM: Accelerating Binary Neural Networks in High-Throughput SRAM Compute Arrays., , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (8): 3064-3076 (2019)IMAC: In-Memory Multi-Bit Multiplication and ACcumulation in 6T SRAM Array., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 67-I (8): 2521-2531 (2020)Functional Read Enabling In-Memory Computations in 1Transistor - 1Resistor Memory Arrays., , , and . IEEE Trans. Circuits Syst., 67-II (12): 3347-3351 (2020)Design Considerations for 3D Heterogeneous Integration Driven Analog Processing-in-Pixel for Extreme-Edge Intelligence., , , , , and . ICRC, page 1-5. IEEE, (2023)