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A research-oriented course on Advanced Multicore Architecture: Contents and active learning methodologies.

, , , and . J. Parallel Distributed Comput., (2017)

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A Hardware Approach to Fairly Balance the Inter-Thread Interference in Shared Caches., , , and . IEEE Trans. Parallel Distributed Syst., 28 (11): 3021-3032 (2017)A Simple Activation/Deactivation Prefetching Scheme for Chip Multiprocessors., , , and . PDP, page 143-150. IEEE Computer Society, (2016)Improving System Turnaround Time with Intel CAT by Identifying LLC Critical Applications., , , , and . Euro-Par, volume 11014 of Lecture Notes in Computer Science, page 603-615. Springer, (2018)A research-oriented course on Advanced Multicore Architecture: Contents and active learning methodologies., , , and . J. Parallel Distributed Comput., (2017)Row Tables: Design Choices to Exploit Bank Locality in Multiprogram Workloads., , , , and . PDP, page 22-26. IEEE Computer Society, (2015)Phase-Aware Cache Partitioning to Target Both Turnaround Time and System Performance., , , , and . IEEE Trans. Parallel Distributed Syst., 31 (11): 2556-2568 (2020)Efficient selective multicore prefetching under limited memory bandwidth., , , and . J. Parallel Distributed Comput., (2018)Application Clustering Policies to Address System Fairness with Intel's Cache Allocation Technology., , , , and . PACT, page 194-205. IEEE Computer Society, (2017)A Research-Oriented Course on Advanced Multicore Architecture., , , and . IPDPS Workshops, page 760-765. IEEE Computer Society, (2015)Student Research Poster: A Low Complexity Cache Sharing Mechanism to Address System Fairness., , , and . PACT, page 455. ACM, (2016)