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Two-Tone Signal Generation for Communication Application ADC Testing., , , , , , , и . Asian Test Symposium, стр. 179-184. IEEE Computer Society, (2012)Multi-bit sigma-delta TDC architecture with self-calibration., , , , , , , , , и 3 other автор(ы). APCCAS, стр. 671-674. IEEE, (2012)30.4 A 1Tb 3b/Cell 3D-Flash Memory in a 170+ Word-Line-Layer Technology., , , , , , , , , и 49 other автор(ы). ISSCC, стр. 428-430. IEEE, (2021)Design of a clock jitter reduction circuit using gated phase blending between self-delayed clock edges., , , , , , , и . ASP-DAC, стр. 103-104. IEEE, (2013)Two-Tone Signal Generation for ADC Testing., , , , , , , и . IEICE Trans. Electron., 96-C (6): 850-858 (2013)A clock jitter reduction circuit using gated phase blending between self-delayed clock edges., , , , , , , и . VLSIC, стр. 142-143. IEEE, (2012)What Should Software Practitioners Know for Adopting Product Line Software Engineering?.. APSEC, стр. 565-566. IEEE Computer Society, (2004)Analysis of the interaction between practices for introducing XP effectively., , , и . ICSE, стр. 544-550. ACM, (2006)A nano-watt power CMOS amplifier with adaptive biasing for power-aware analog LSIs., , , , , и . ESSCIRC, стр. 69-72. IEEE, (2012)I-Q signal generation techniques for communication IC testing and ATE systems., , , , , и . ITC, стр. 1-10. IEEE, (2016)