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Exploring the design space of LUT-based transparent accelerators., , , и . CASES, стр. 11-21. ACM, (2005)Load squared: Adding logic close to memory to reduce the latency of indirect loads in embedded and general systems., , и . J. Embed. Comput., 2 (1): 5-14 (2006)On the evaluation of the impact of shared resources in multithreaded COTS processors in time-critical environments., , , , , и . ACM Trans. Archit. Code Optim., 8 (4): 34:1-34:25 (2012)Exploiting structural redundancy of SIMD accelerators for their built-in self-testing/diagnosis and reconfiguration., , , и . ASAP, стр. 141-148. IEEE Computer Society, (2011)Load squared: adding logic close to memory to reduce the latency of indirect loads with high miss ratios., , и . SIGARCH Comput. Archit. News, 33 (3): 17-24 (2005)A memory interface for multi-purpose multi-stream accelerators., , , , и . CASES, стр. 107-116. ACM, (2010)Scalable subgraph mapping for acyclic computation accelerators., , , и . CASES, стр. 147-157. ACM, (2006)Reconciling specialization and flexibility through compound circuits., , , и . HPCA, стр. 277-288. IEEE Computer Society, (2009)Load squared: adding logic close to memory to reduce the latency of indirect loads with high miss ratios., , и . MEDEA@PACT, стр. 17-24. ACM, (2004)System-wide performance monitors and their application to the optimization of coherent memory accesses., , и . PPoPP, стр. 247-254. ACM, (2005)