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An adaptive migration-replication scheme (AMR) for shared cache in chip multiprocessors.

N. Chaturvedi, A. Subramaniyan, and S. Gurunarayanan. J. Supercomput., 71 (10): 3904-3933 (2015)

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Umeswaran Arunagirinathan

Pattra Arunlakshana

Vinayagam Arunachalam

Manonmani Arunachalam

Arunee Hematulin

Other publications of authors with the same name

A 2.46M Reads/s Seed-Extension Accelerator for Next-Generation Sequencing Using a String-Independent PE Array.Z. Wang, T. Zhang, D. Fujiki, A. Subramaniyan, X. Wu, M. Yasuda, S. Miyoshi, M. Kawaminami, R. Das, S. Narayanasamy and 1 other author(s). IEEE J. Solid State Circuits, 56 (3): 824-833 (2021)GenDP: A Framework of Dynamic Programming Acceleration for Genome Sequencing Analysis.Y. Gu, A. Subramaniyan, T. Dunn, A. Khadem, K. Chen, S. Paul, M. Vasimuddin, S. Misra, D. Blaauw, S. Narayanasamy and 1 other author(s). ISCA, page 25:1-25:15. ACM, (2023)Cache Automaton: Repurposing Caches for Automata Processing.A. Subramaniyan, J. Wang, E. Balasubramanian, D. Blaauw, D. Sylvester, and R. Das. PACT, page 373. IEEE Computer Society, (2017)Parallel Automata Processor.A. Subramaniyan, and R. Das. ISCA, page 600-612. ACM, (2017)17.3 GCUPS Pruning-Based Pair-Hidden-Markov-Model Accelerator for Next-Generation DNA Sequencing.X. Wu, A. Subramaniyan, Z. Wang, S. Narayanasamy, R. Das, and D. Blaauw. VLSI Circuits, page 1-2. IEEE, (2020)Reduced order modeling for clearance control in turbomachinery.E. Biyik, F. D'Amato, A. Subramaniyan, and C. Sun. CCA, page 1143-1148. IEEE, (2016)A Compute SRAM with Bit-Serial Integer/Floating-Point Operations for Programmable In-Memory Vector Acceleration.J. Wang, X. Wang, C. Eckert, A. Subramaniyan, R. Das, D. Blaauw, and D. Sylvester. ISSCC, page 224-226. IEEE, (2019)Cache automaton.A. Subramaniyan, J. Wang, E. Balasubramanian, D. Blaauw, D. Sylvester, and R. Das. MICRO, page 259-272. ACM, (2017)Assisting Asset Model Development with Evolutionary Augmentation.S. Gustafson, A. Subramaniyan, and A. Yousuf. GPTP, page 197-210. Springer, (2016)In-/Near-Memory ComputingD. Fujiki, X. Wang, A. Subramaniyan, and R. Das. Synthesis Lectures on Computer Architecture Morgan & Claypool Publishers, (2021)

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Disambiguation of "Subramaniyan, Arun"

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An adaptive migration-replication scheme (AMR) for shared cache in chip multiprocessors.

Please choose a person to relate this publication to

Umeswaran Arunagirinathan

Pattra Arunlakshana

Vinayagam Arunachalam

Manonmani Arunachalam

Arunee Hematulin

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Subramaniyan, Arun"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML An adaptive migration-replication scheme (AMR) for shared cache in chip multiprocessors.

Please choose a person to relate this publication to

Umeswaran Arunagirinathan

Pattra Arunlakshana

Vinayagam Arunachalam

Manonmani Arunachalam

Arunee Hematulin

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

An adaptive migration-replication scheme (AMR) for shared cache in chip multiprocessors.