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Disambiguation of "Hwang, Yuan-Shin"

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Trading Conditional Execution for More Registers on ARM Processors.

, , , and . EUC, page 53-59. IEEE Computer Society, (2010)

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Shin-Joon Hwang

Shin-Yuan Tsai

Yuan-shang Hwang

Dong-Shin Shin

Sungil Hwang

 

Other publications of authors with the same name

Interprocedural definition-use chains of dynamic pointer-linked data structures., and . Sci. Program., 11 (1): 3-37 (2003)On reducing load/store latencies of cache accesses., and . J. Syst. Archit., 56 (1): 1-15 (2010)Enabling PoCL-based runtime frameworks on the HSA for OpenCL 2.0 support., , , , and . J. Syst. Archit., (2017)Hierarchical Interconnection Networks Based on (3, 3)-Graphs for Massively Parallel Processors., and . IEICE Trans. Inf. Syst., 87-D (7): 1649-1656 (2004)Runtime and Language Support for Compiling Adaptive Irregular Programs on Distributed-memory Machines., , , , , and . Softw. Pract. Exp., 25 (6): 597-621 (1995)Novel Hierarchical Interconnection Networks for High-Performance Multicomputer Systems., , , and . J. Inf. Sci. Eng., 20 (6): 1213-1229 (2004)Analyzing OpenCL 2.0 workloads using a heterogeneous CPU-GPU simulator., , , , , , , , , and 9 other author(s). ISPASS, page 127-128. IEEE Computer Society, (2017)OpenCL 2.0 Compiler Adaptation on LLVM for PTX Simulators., , , , , and . ICPP Workshops, page 53-58. IEEE Computer Society, (2017)Snug set-associative caches: reducing leakage power while improving performance., and . ISLPED, page 345-350. ACM, (2005)Side Effect Analysis on User-Defined Reduction Functions with Dynamic Pointer-Linked Data Structures., and . LCPC, volume 1239 of Lecture Notes in Computer Science, page 594-596. Springer, (1996)