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Modelling and Evaluation of a Network on Chip Architecture Using SDL., , и . SDL Forum, том 2708 из Lecture Notes in Computer Science, стр. 166-182. Springer, (2003)Region-Based Routing: A Mechanism to Support Efficient Routing Algorithms in NoCs., , , , , , и . IEEE Trans. Very Large Scale Integr. Syst., 17 (3): 356-369 (2009)Application Specific Routing Algorithms for Networks on Chip., , , и . IEEE Trans. Parallel Distributed Syst., 20 (3): 316-330 (2009)Application-Specific Routing Algorithms for Low Power Network on Chip Design., , , и . Low Power Networks-on-Chip, Springer, (2011)A Multi-level Routing Scheme and Router Architecture to Support Hierarchical Routing in Large Network on Chip Platforms., , и . Euro-Par Workshops, том 6586 из Lecture Notes in Computer Science, стр. 153-161. Springer, (2010)Junction based routing: a scalable technique to support source routing in large NoC platforms., , и . NoCArc@MICRO, стр. 45-50. ACM, (2012)An Abstraction to Support Design of Deadlock-free Routing Algorithms for Large and Hierarchical NoCs., и . CIT, стр. 59-66. IEEE Computer Society, (2011)A Method for Router Table Compression for Application Specific Routing in Mesh Topology NoC Architectures., , и . SAMOS, том 4017 из Lecture Notes in Computer Science, стр. 373-384. Springer, (2006)Design of Bandwidth Aware and Congestion Avoiding Efficient Routing Algorithms for Networks-on-Chip Platforms., , , , , и . NOCS, стр. 97-106. IEEE Computer Society, (2008)An Efficient Router Architecture and Its FPGA Prototyping to Support Junction Based Routing in NoC Platforms., , и . DSD, стр. 297-300. IEEE Computer Society, (2013)