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Disambiguation of "Sidiropoulos, Stefanos"

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High-speed electrical signaling: overview and limitations.

, , and . IEEE Micro, 18 (1): 12-24 (1998)

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Charalambos Sidiropoulos

Melanie Sidiropoulos

Stefanos Daskalakis

Stefanos Charaktiniotis

Georges Sidiropoulos

 

Other publications of authors with the same name

A 0.4-4-Gb/s CMOS quad transceiver cell using on-chip regulated dual-loop PLLs., , , , , , , and . IEEE J. Solid State Circuits, 38 (5): 747-754 (2003)A 700-Mb/s/pin CMOS signaling interface using current integrating receivers., and . IEEE J. Solid State Circuits, 32 (5): 681-690 (1997)High-speed electrical signaling: overview and limitations., , and . IEEE Micro, 18 (1): 12-24 (1998)An integrated VCSEL driver for 10Gb ethernet in 0.13µm CMOS., , , , , , , , , and 4 other author(s). ISSCC, page 930-939. IEEE, (2006)Weighted Round-Robin Cell Multiplexing in a General-Purpose ATM Switch Chip., , and . IEEE J. Sel. Areas Commun., 9 (8): 1265-1279 (1991)A speed, power, and supply noise evaluation of ECL driver circuits., , and . IEEE J. Solid State Circuits, 31 (1): 38-45 (1996)A variable-frequency parallel I/O interface with adaptive power-supply regulation., , , , and . IEEE J. Solid State Circuits, 35 (11): 1600-1610 (2000)A Framework for Designing Reusable Analog Circuits., , and . ICCAD, page 375-381. IEEE Computer Society / ACM, (2003)A semidigital dual delay-locked loop., and . IEEE J. Solid State Circuits, 32 (11): 1683-1692 (1997)A 10.3-GS/s, 6-Bit Flash ADC for 10G Ethernet Applications., , , , , , and . IEEE J. Solid State Circuits, 48 (12): 3038-3048 (2013)