Author of the publication

SICARELO: A tool for synthesis of locally-clocked extended burst-mode asynchronous Controllers.

, , , , and . LASCAS, page 1-4. IEEE, (2014)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A novel state assignment method for XBM AFSMs without the essential hazard assumption., , , and . LASCAS, page 1-4. IEEE, (2018)A novel asynchronous interface with pausible clock for partitioned synchronous modules., , , and . LASCAS, page 1-4. IEEE, (2015)Design of asynchronous systems on FPGA using direct mapping and synchronous specification., , , and . ReConFig, page 1-6. IEEE, (2013)Synthesis of Asynchronous State Machines from Synchronous Specifications., , , , and . LASCAS, page 1-4. IEEE, (2020)A Tools Flow for Synthesis of Asynchronous Control Circuits from Extended STG Specifications., , , , and . LASCAS, page 225-228. IEEE, (2019)Synthesis of Multi-Burst Controllers as Modified Huffman Machines., , , and . SBCCI, page 220-225. IEEE Computer Society, (2001)Design of Asynchronous Pipelines with QDI Template Using Commercial FPGA., , and . LASCAS, page 1-4. IEEE, (2022)SICARELO: A tool for synthesis of locally-clocked extended burst-mode asynchronous Controllers., , , , and . LASCAS, page 1-4. IEEE, (2014)Minimization and Encoding of High Performance Asynchronous State Machines Based on Genetic Algorithm., , , , and . SBCCI, page 4:1-4:6. ACM, (2015)Fault-Tolerant Quasi Delay Insensitive Combinational Circuits in Commercial FPGA Devices., , and . LATS, page 1-6. IEEE, (2021)