Author of the publication

Implementation of W-CDMA Cell Search on a Highly Parallel and Scalable MPSoC.

, , , , and . J. Signal Process. Syst., 64 (1): 137-148 (2011)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Applying CDMA Technique to Network-on-Chip., , and . IEEE Trans. Very Large Scale Integr. Syst., 15 (10): 1091-1100 (2007)Multicore Software-Defined Radio Architecture for GNSS Receiver Signal Processing., , , and . EURASIP J. Embed. Syst., (2009)Topology optimization for application-specific networks-on-chip., , , and . SLIP, page 53-60. ACM, (2004)Design, implementation and analysis of a run-time configurable Memory Management Unit on FPGA., , , and . NORCAS, page 1-8. IEEE, (2015)Accelerating Computation on an Android Phone with OpenCL Parallelism and Optimizing Workload Distribution between a Phone and a Cloud Service., , and . UIC/ATC/ScalCom/CBDCom/IoP/SmartWorld, page 636-642. IEEE Computer Society, (2016)FPGA implementation and integration of a reconfigurable CAN-based co-processor to the coffee risc processor., , , and . NORCAS, page 1-6. IEEE, (2016)Implementation of the W-CDMA cell search on a MPSOC designed for software defined radios., , , , and . SiPS, page 030-035. IEEE, (2009)Energy and power estimation of Coarse-Grain Reconfigurable Array based Fast Fourier Transform accelerators., , , and . ReCoSoC, page 1-4. IEEE, (2012)Issues in the development of a practical NoC: the Proteo concept., , and . Integr., 38 (1): 95-105 (2004)Integration issues of a run-time configurable memory management unit to a RISC processor on FPGA., , , and . Microprocess. Microsystems, (2017)