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A computational model for SAT-based verification of hardware-dependent low-level embedded system software.

, , , , , and . ASP-DAC, page 711-716. IEEE, (2013)

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Formale Verifikation wird zum Handwerk.. MBMV (1), page 9-10. MoPress, (2001)An Exhaustive Approach to Detecting Transient Execution Side Channels in RTL Designs of Processors., , , , , , , , and . IEEE Trans. Computers, 72 (1): 222-235 (2023)The Scale4Edge RISC-V Ecosystem., , , , , , , , , and 17 other author(s). DATE, page 808-813. IEEE, (2022)A New Formal Verification Approach for Hardware-dependent Embedded System Software., , , , , , , and . IPSJ Trans. Syst. LSI Des. Methodol., (2013)A computational model for SAT-based verification of hardware-dependent low-level embedded system software., , , , , and . ASP-DAC, page 711-716. IEEE, (2013)An Exhaustive Approach to Detecting Transient Execution Side Channels in RTL Designs of Processors., , , , , , , , and . CoRR, (2021)Formal plausibility checks for environment constraints., , , , and . FDL, page 13-19. IEEE, (2012)Formale Verifikation für Nicht-Formalisten (Formal Verification for Non-Formalists)., and . Informationstechnik Tech. Inform., 43 (1): 22-28 (2001)A Hardware-Dependent Model for SAT-based Verification of Interrupt-Driven Low-level Embedded System Software., , , , , and . MBMV, page 49-60. Institut für Angewandte Mikroelektronik und Datentechnik, Fakultät für Informatik und Elektrotechnik, Universität Rostock, (2013)Compositional Completeness over reactive Constraints., , , , and . MBMV, page 83-96. Institut für Angewandte Mikroelektronik und Datentechnik, Fakultät für Informatik und Elektrotechnik, Universität Rostock, (2013)