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Accelerating Sequence Alignments Based on FM-Index Using the Intel KNL Processor., , , , , and . IEEE ACM Trans. Comput. Biol. Bioinform., 17 (4): 1093-1104 (2020)Enabling fast and energy-efficient FM-index exact matching using processing-near-memory., , , and . J. Supercomput., 77 (9): 10226-10251 (2021)Hardware design of a Binary Integer Decimal-based floating-point adder., , and . ICCD, page 288-295. IEEE, (2007)Floating-Point Fused Multiply-Add under HUB Format., , and . ARITH, page 1-8. IEEE, (2020)A Combined Decimal and Binary Floating-Point Multiplier., , , , and . ASAP, page 8-15. IEEE Computer Society, (2009)Hardware Design of a Binary Integer Decimal-based IEEE P754 Rounding Unit., , and . ASAP, page 115-121. IEEE Computer Society, (2007)Unbiased Rounding for HUB Floating-Point Addition., , and . IEEE Trans. Computers, 67 (9): 1359-1365 (2018)Normalizing or Not Normalizing? An Open Question for Floating-Point Arithmetic in Embedded Systems., and . ARITH, page 188-195. IEEE Computer Society, (2017)Fast HUB Floating-Point Adder for FPGA., , and . IEEE Trans. Circuits Syst. II Express Briefs, 66-II (6): 1028-1032 (2019)Binary Integer Decimal-Based Floating-Point Multiplication., , and . IEEE Trans. Computers, 62 (7): 1460-1466 (2013)