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Optimizing machine learning logic circuits with constant signal propagation., , , and . Integr., (2022)Evaluation of Digital Circuit Design by Combining Two - and Multi-Level Approximate Logic Synthesis., , , and . ISVLSI, page 1-6. IEEE, (2023)BTI, HCI and TDDB aging impact in flip-flops., , , and . Microelectron. Reliab., 53 (9-11): 1355-1359 (2013)Soft Error Sensibility Window at FinFET DICE SRAM., , , and . LASCAS, page 1-4. IEEE, (2021)Reliability analysis of majority voters under permanent faults., , and . LATS, page 180. IEEE, (2016)Exploring BDDs to reduce test pattern set., , and . LATS, page 1-4. IEEE, (2017)A Novel SPICE Model of Memristive Devices with Threshold Current Based Control., and . SBCCI, page 1-6. IEEE, (2018)Simple and accurate method for fast static currentestimation in cmos complex gates with interaction ofleakage mechanisms., , , , , and . ACM Great Lakes Symposium on VLSI, page 407-410. ACM, (2008)Inserting permanent fault input dependence on PTM to improve robustness evaluation., , , , , and . SBCCI, page 1-6. IEEE, (2016)Possible Reductions to Generate circuits from BDDs., , , , and . ISVLSI, page 406-409. IEEE, (2022)