Author of the publication

Automatic benchmark generation for cache optimization of matrix operations.

, and . ACM Southeast Regional Conference, page 195-204. ACM, (1995)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

#COVIDisAirborne: AI-enabled multiscale computational microscopy of delta SARS-CoV-2 in a respiratory aerosol., , , , , , , , , and 42 other author(s). Int. J. High Perform. Comput. Appl., 37 (1): 28-44 (2023)A Case Study of Some Issues in the Optimization of Fortran 90 Array Notation.. Sci. Program., 5 (3): 219-237 (1996)Bandwidth Limits in the Intel Xeon Max (Sapphire Rapids with HBM) Processors.. ISC Workshops, volume 13999 of Lecture Notes in Computer Science, page 403-413. Springer, (2023)Intelligent resolution: Integrating Cryo-EM with AI-driven multi-resolution simulations to observe the severe acute respiratory syndrome coronavirus-2 replication-transcription machinery in action., , , , , , , , , and 24 other author(s). Int. J. High Perform. Comput. Appl., 36 (5-6): 603-623 (2022)Evaluation and optimization of multicore performance bottlenecks in supercomputing applications., , , , , and . ISPASS, page 32-43. IEEE Computer Society, (2011)Characterization of simultaneous multithreading (SMT) efficiency in POWER5., , , , and . IBM J. Res. Dev., 49 (4-5): 555-564 (2005)A Highly Efficient Multicore Floating-Point FFT Architecture Based on Hybrid Linear Algebra/FFT Cores., , and . J. Signal Process. Syst., 77 (1-2): 169-190 (2014)Appearances of the Birthday Paradox in High Performance Computing., , and . CoRR, (2019)The SGI Origin software environment and application performance., , , , and . COMPCON, page 165-170. IEEE Computer Society, (1997)HPL and DGEMM performance variability on the Xeon Platinum 8160 processor.. SC, page 18:1-18:13. IEEE / ACM, (2018)