( en | de | ru )

 

Disambiguation of "Morad, Ronny"

Author of the publication

copydeleteadd this publication to your clipboard
Unveiling difficult bugs in address translation caching arrays for effective post-silicon validation.

, , , , , , and . ICCD, page 544-551. IEEE Computer Society, (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Morad Oueslati

Iris Morad

Morad Ghaemi

Akbar Moradkhan

Majid Moradmand

 

Other publications of authors with the same name

Post-Silicon Validation in the SoC Era: A Tutorial Introduction., , , and . IEEE Des. Test, 34 (3): 68-92 (2017)Solutions to IBM POWER8 verification challenges., , , , , , , , , and 12 other author(s). IBM J. Res. Dev., (2015)Ontology-Based Tools in the Service of Hardware Verification., , , , , , , , and . SEKE, page 303-308. Knowledge Systems Institute Graduate School, (2010)SLAM: SLice And Merge - Effective Test Generation for Large Systems., , , , and . Haifa Verification Conference, volume 8244 of Lecture Notes in Computer Science, page 151-165. Springer, (2013)Special Session on Debugging., , , and . Haifa Verification Conference, volume 6504 of Lecture Notes in Computer Science, page 24-28. Springer, (2010)Hybrid checking for microarchitectural validation of microprocessor designs on acceleration platforms., , , , , , , and . ICCAD, page 311-317. IEEE, (2013)Facing the challenge of new design features: an effective verification approach., , , , and . DAC, page 842-847. ACM, (2011)Checking architectural outputs instruction-by-instruction on acceleration platforms., , , , and . DAC, page 955-961. ACM, (2012)Unveiling difficult bugs in address translation caching arrays for effective post-silicon validation., , , , , , and . ICCD, page 544-551. IEEE Computer Society, (2016)Probabilistic bug-masking analysis for post-silicon tests in microprocessor verification., , , , , , and . DAC, page 24:1-24:6. ACM, (2016)