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Applying data-parallel and scalar optimizations for the efficient implementation of the G.729A and G.723.1 speech coding standards., , , and . SIP, page 39-44. IASTED/ACTA Press, (2005)Guest Editorial., , and . IET Comput. Digit. Tech., 9 (1): 1-2 (2015)Sparse and dense matrix multiplication hardware for heterogeneous multi-precision neural networks., and . Array, (2021)Power/Area Analysis of a FPGA-Based Open-Source Processor using Partial Dynamic Reconfiguration., , , and . DSD, page 592-598. IEEE Computer Society, (2008)Fault-tolerant dynamically reconfigurable NoC-based SoC., and . ASAP, page 31-36. IEEE Computer Society, (2008)Sparse Matrix-Dense Matrix Multiplication on Heterogeneous CPU+FPGA Embedded System., and . PARMA-DITAM@HiPEAC, page 1:1-1:6. ACM, (2020)Parallelizing Workload Execution in Embedded and High-Performance Heterogeneous Systems., , , , , , , and . CoRR, (2018)Relationship Detection Measures for Binary SoC Data., and . CoRR, (2019)Dynamic Voltage Scaling in a FPGA-based System-on-Chip., , and . FPL, page 459-462. IEEE, (2007)Ultrasonic Levitation with Software-Defined FPGAs and Electronically Phased Arrays., , , , , and . AHS, page 41-48. IEEE, (2019)