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Spatial frequency based motion estimation for image sequence compression.

, , and . HiPC, page 257-262. IEEE Computer Society, (1996)

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Analysis and Design of a Multi-Step Bias-Flip Rectifier for Piezoelectric Energy Harvesting., , , , and . IEEE J. Solid State Circuits, 54 (9): 2590-2600 (2019)An enhanced topology for reliability of a high performance 3.3V I/O buffer in a single-well bulk CMOS 1.8v-oxide low voltage process., , and . ISQED, page 103-106. IEEE Computer Society, (2009)Spatial frequency based motion estimation for image sequence compression., , and . HiPC, page 257-262. IEEE Computer Society, (1996)8.3 A 10.5μA/MHz at 16MHz single-cycle non-volatile memory access microcontroller with full state retention at 108nA in a 90nm process., , , and . ISSCC, page 1-3. IEEE, (2015)Multi-Step Bias-Flip Rectification for Piezoelectric Energy Harvesting., , , , and . ESSCIRC, page 42-45. IEEE, (2018)A high performance, high voltage output buffer in a low voltage CMOS process., , , , and . CICC, page 227-230. IEEE, (2005)Optimization of 1.8V I/O circuits for performance, reliability at the 100nm technology node., , , , , , and . VLSI Design, page 122-127. IEEE Computer Society, (2003)A 40nm 650Mhz 0.5fJ/Bit/Search TCAM Compiler Using Complementary Bit-cell Architecture., , , , , , and . VLSI Design, page 55-59. IEEE Computer Society, (2013)Design and technology interaction beyond 32nm., , , , and . CICC, page 1-9. IEEE, (2011)150nA IQ, Quad Input - Quad Output, Intelligent Integrated Power Management for IoT Applications., , , , , , and . VLSID, page 169-174. IEEE, (2021)