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Disambiguation of "Mahapatra, Rabi N."

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High Performance Code Generation through Lazy Activation Records.

, , , and . Interaction between Compilers and Computer Architectures, page 37-50. IEEE Computer Society, (2003)

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Lakshman Mahapatra

Suddhasatta Mahapatra

Rabi Massaji

Rabi Chahin

 

Other publications of authors with the same name

Modelling a 2-D inverse fast cosine transform algorithm on a multistage network, and . Signal Processing, 30 (2): 235--243 (January 1993)Dynamic context management for low power coarse-grained reconfigurable architecture., and . ACM Great Lakes Symposium on VLSI, page 33-38. ACM, (2009)TCAM enabled on-chip logic minimization., and . DAC, page 678-683. ACM, (2005)Mapping of Neural Network Models Onto Two-Dimensional Processor Arrays., and . Parallel Comput., 22 (10): 1345-1357 (1996)Key Predistribution Schemes for Establishing Pairwise Keys with a Mobile Sink in Sensor Networks., and . IEEE Trans. Parallel Distributed Syst., 22 (1): 176-184 (2011)A reconfigurable computing architecture for semantic information filtering., , , and . IEEE BigData, page 212-218. IEEE Computer Society, (2013)Layer assignment for crosstalk risk minimization., , , and . ASP-DAC, page 159-162. IEEE Computer Society, (2004)A Heuristic for Peak Power Constrained Design of Network-on-Chip (NoC) Based Multimode Systems., , , and . VLSI Design, page 124-129. IEEE Computer Society, (2005)An Efficient Key Distribution Scheme for Establishing Pairwise Keys with a Mobile Sink in Distributed Sensor Networks., and . IPCCC, page 264-270. IEEE Computer Society, (2008)Using FPGA implementations for evaluation of internet retransmission-time-out predictors., , and . ECBS, page 17:1-17:4. ACM, (2017)