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Fast floorplanning for effective prediction and construction., , , and . IEEE Trans. Very Large Scale Integr. Syst., 9 (2): 341-351 (2001)Beyond PID Controllers: PPO with Neuralized PID Policy for Proton Beam Intensity Control in Mu2e., , , , , , , , , and 14 other author(s). CoRR, (2023)Integrating Scheduling and Physical Design into a Coherent Compilation Cycle for Reconfigurable Computing Architectures., , and . DAC, page 635-640. ACM, (2001)ML-based Real-Time Control at the Edge: An Approach Using hls4ml., , , , , , , , , and 9 other author(s). CoRR, (2023)A C to Hardware/Software Compiler., , , and . FCCM, page 331-332. IEEE Computer Society, (2000)A Combined Arithmetic-High-Level Synthesis Solution to Deploy Partial Carry-Save Radix-8 Booth Multipliers in Datapaths., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (2): 742-755 (2019)Placement and Floorplanning in Dynamically Reconfigurable FPGAs., , , and . ACM Trans. Reconfigurable Technol. Syst., 3 (4): 24:1-24:34 (2010)A high-level clustering algorithm targeting dual Vdd FPGAs., , , and . ACM Trans. Design Autom. Electr. Syst., 13 (4): 57:1-57:20 (2008)Temperature-aware resource allocation and binding in high-level synthesis., , and . DAC, page 196-201. ACM, (2005)Systematic temperature sensor allocation and placement for microprocessors., and . DAC, page 542-547. ACM, (2006)