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Survey of Microarchitectural Side and Covert Channels, Attacks, and Defenses.. IACR Cryptology ePrint Archive, (2016)XMSS and Embedded Systems - XMSS Hardware Accelerators for RISC-V., , , , , , and . IACR Cryptology ePrint Archive, (2018)Parameterized Hardware Accelerators for Lattice-Based Cryptography and Their Application to the HW/SW Co-Design of qTESLA., , , , , and . IACR Trans. Cryptogr. Hardw. Embed. Syst., 2020 (3): 269-306 (2020)Towards Weakly Consistent Local Storage Systems., , , , and . SoCC, page 294-306. ACM, (2016)Short Paper: Device- and Locality-Specific Fingerprinting of Shared NISQ Quantum Computers., , and . CoRR, (2022)Leaking Information Through Cache LRU States., and . CoRR, (2019)Leaky Frontends: Micro-Op Cache and Processor Frontend Vulnerabilities., , and . CoRR, (2021)Understanding the Insecurity of Processor Caches Due to Cache Timing-Based Vulnerabilities., , and . IEEE Secur. Priv., 19 (3): 42-49 (2021)Intrinsic Rowhammer PUFs: Leveraging the Rowhammer Effect for Improved Security., , , , , , and . CoRR, (2019)Information Leakage from FPGA Routing and Logic Elements., and . ICCAD, page 63:1-63:9. IEEE, (2020)