( en | de | ru )

 

Disambiguation of "Lee, Jaejin"

Author of the publication

copydeleteadd this publication to your clipboard
The Pensieve Project: A Compiler Infrastructure for Memory Models.

, , , , , and . ISPAN, page 239-244. IEEE Computer Society, (2002)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Xavier Lee Lee

Bongsoo Lee

The role of negative regulators in coordination of the Myxococcus xanthus developmental program. Uni Marburg, (2009)

Min-Hi Lee

Induction and regulation of antiviral defence mechanisms through intracytoplasmic sensors. HU Berlin, (2009)

Hyemin Lee

Viktor Lee

 

Other publications of authors with the same name

An algorithmic sign-reversing involution for special rim-hook tableaux., and . J. Algorithms, 59 (2): 149-161 (2006)A watermarking sequence using parities of error control coding for image authentication and correction., and . IEEE Trans. Consumer Electronics, 46 (2): 313-317 (2000)Scratchpad memory management for portable systems with a memory management unit., , and . EMSOFT, page 321-330. ACM, (2006)Scratchpad memory management in a multitasking environment., , and . EMSOFT, page 265-274. ACM, (2008)Scheduling for Better Energy Efficiency on Many-Core Chips., , , , and . JSSPP, volume 10353 of Lecture Notes in Computer Science, page 46-68. Springer, (2015)HIPS 2019 Keynote.. IPDPS Workshops, page 352. IEEE, (2019)An OpenCL optimizing compiler for reconfigurable processors., , , , , , and . FPT, page 184-191. IEEE, (2013)A convergence of geometric mean for T-related fuzzy numbers., and . Fuzzy Sets Syst., 121 (3): 537-543 (2001)Message-passing iterative decoding between detector and RSC code decoder for PMR channel., , , and . IEEE Trans. Consumer Electronics, 54 (4): 1750-1754 (2008)A 1.1-V 10-nm Class 6.4-Gb/s/Pin 16-Gb DDR5 SDRAM With a Phase Rotator-ILO DLL, High-Speed SerDes, and DFE/FFE Equalization Scheme for Rx/Tx., , , , , , , , , and 15 other author(s). IEEE J. Solid State Circuits, 55 (1): 167-177 (2020)