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A real-time setup for multisite signal recording and processing in living neural networks.

, , , , , , and . ISCAS, page 2953-2956. IEEE, (2008)

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Low noise and low cost neural amplifiers., , and . ICECS, page 1324-1327. IEEE, (2007)Energy-efficient Level Shifter topology., , , , , and . PATMOS, page 148-151. IEEE, (2015)A novel approach to reduce power consumption in level shifter for Multiple Dynamic Supply Voltage., , , and . ICECS, page 715-718. IEEE, (2013)Low Latency FPGA Implementation of Izhikevich-Neuron Model., , , and . IESS, volume 523 of IFIP Advances in Information and Communication Technology, page 210-217. Springer, (2015)A real-time setup for multisite signal recording and processing in living neural networks., , , , , , and . ISCAS, page 2953-2956. IEEE, (2008)Overhead for independent net approach for Global Routing., , and . LASCAS, page 1-4. IEEE, (2015)Exploring more efficient architectures for Multiple Dynamic Supply Voltage designs., , , and . LASCAS, page 1-4. IEEE, (2014)A nonlinear placement for FPGAs: The chaotic place., , and . LASCAS, page 1-4. IEEE, (2018)Reducing the amount of transistors by gate merging., , and . LASCAS, page 1-4. IEEE, (2018)DHyANA: A NoC-based neural network hardware architecture., , , , and . ICECS, page 177-180. IEEE, (2016)