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Disambiguation of "Ishihara, Tohru"

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An integrated optimization framework for reducing the energy consumption of embedded real-time applications.

, , , , , , , , , , , and . ISLPED, page 271-276. IEEE/ACM, (2011)

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Tohru Iwai

Aeka Ishihara

Hirofumi Ishihara

 

Other publications of authors with the same name

Wide-Supply-Range All-Digital Leakage Variation Sensor for On-Chip Process and Temperature Monitoring., , , and . IEEE J. Solid State Circuits, 50 (11): 2475-2490 (2015)Message from the Editor-in-Chief.. IPSJ Trans. Syst. LSI Des. Methodol., (2024)Identification of Redundant Flip-Flops Using Fault Injection for Low-Power Approximate Computing Circuits., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 107 (3): 540-548 (2024)Virtualizing DVFS for Energy Minimization of Embedded Dual-OS Platform., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 107 (1): 3-15 (January 2024)DLIC: Decoded loop instructions caching for energy-aware embedded processors., , and . ACM Trans. Embed. Comput. Syst., 13 (1): 6:1-6:26 (2013)Value-dependence of SRAM leakage in deca-nanometer technologies., and . IEICE Electron. Express, 5 (1): 23-28 (2008)A Standard Cell Optimization Method for Near-Threshold Voltage Operations., , , and . PATMOS, volume 7606 of Lecture Notes in Computer Science, page 32-41. Springer, (2012)Microarchitectural-level statistical timing models for near-threshold circuit design., , and . ASP-DAC, page 87-93. IEEE, (2015)Maximizing Energy Efficiency of on-Chip Caches Exploiting Hybrid Memory Structure., , , and . PATMOS, page 237-242. IEEE, (2018)Power-Pro: Programmable Power Management Architecture., and . ASP-DAC, page 321-322. IEEE, (1998)