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Incorporating Pattern Prediction Technique for Energy Efficient Filter Cache Design.

, , , and . IWSOC, page 44-47. IEEE Computer Society, (2003)

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Incorporating Pattern Prediction Technique for Energy Efficient Filter Cache Design., , , and . IWSOC, page 44-47. IEEE Computer Society, (2003)Design considerations for multi-radio co-existence on asynchronous processors using LAD extensions., , and . CISS, page 413. IEEE, (2006)Decode filter cache for energy efficient instruction cache hierarchy in super scalar architectures., , and . ASP-DAC, page 373-379. IEEE Computer Society, (2004)Profile Directed Instruction Cache Tuning for Embedded Systems., , and . ISVLSI, page 277-282. IEEE Computer Society, (2006)Task Mapping in Heterogeneous MPSoCs for System Level Design., and . ICECCS, page 56-65. IEEE Computer Society, (2008)Custom Instruction Filter Cache Synthesis for Low-Power Embedded Systems., and . IEEE International Workshop on Rapid System Prototyping, page 151-157. IEEE Computer Society, (2005)Static Pattern Predictor (SPP) Based Low Power Instruction Cache Design., , , and . Embedded Systems and Applications, page 210-215. CSREA Press, (2003)Customizable instruction cache hierarchy for embedded systems. Nanyang Technological University, Singapore, (2005)Dynamic Filter Cache for Low Power Instruction Memory Hierarchy., , and . DSD, page 607-610. IEEE Computer Society, (2004)