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Deadline-Aware Joint Optimization of Sleep Transistor and Supply Voltage for FinFET Based Embedded Systems.

, , , , and . ACM Great Lakes Symposium on VLSI, page 427-430. ACM, (2017)

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Characterization of a Fault-tolerant NoC Router., and . ISCAS, page 381-384. IEEE, (2007)A 0.18 µm implementation of a floating-point unit for a processing-in-memory system., , , and . ISCAS (2), page 453-456. IEEE, (2004)A self-sensing tristate pad driver for control signals of multiple bus controllers., , and . ISCAS (1), page 447-450. IEEE, (1999)Voltage-pulse driven harmonic resonant rail drivers for low-power applications., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 11 (5): 762-777 (2003)A Filtering Mechanism to Reduce Network Bandwidth Utilization of Transaction Execution., , , and . ACM Trans. Archit. Code Optim., 12 (4): 51:1-51:26 (2016)A Bus-Efficient Low-Latency Network Interface for the PDSS Multicomputer., , , and . HPDC, page 213-222. IEEE Computer Society, (1997)Routing in Bidirectional k-ary n-cubes with the Red Rover Algorithm., and . PDPTA, page 1184-1193. CSREA Press, (1997)Design trade-offs in floating-point unit implementation for embedded and processing-in-memory systems., , and . ISCAS (4), page 3331-3334. IEEE, (2005)An area-efficient and protected network interface for processing-in-memory systems., , , and . ISCAS (3), page 2951-2954. IEEE, (2005)Consolidated conflict detection for hardware transactional memory., and . PACT, page 201-212. ACM, (2014)