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20.4 A fully integrated single-chip 60GHz CMOS transceiver with scalable power consumption for proximity wireless communication.

S. Saigusa, T. Mitomo, H. Okuni, M. Hosoya, A. Sai, S. Kawai, T. Wang, M. Furuta, K. Shiraishi, K. Ban, S. Horikawa, T. Tandai, R. Matsuo, T. Tomizawa, H. Hoshino, J. Matsuno, Y. Tsutsumi, R. Tachibana, O. Watanabe, and T. Itakura. ISSCC, page 348-349. IEEE, (2014)

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Hirokiyo Furuta

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A 1V 10b 125MSample/s A/D Converter Using Cascade Amp-Sharing and Capacitance Coupling Techniues.K. Honda, M. Furuta, and S. Kawahito. ISCAS, page 1031-1034. IEEE, (2006)Low-Power Design of High-Speed A/D Converters.S. Kawahito, K. Honda, M. Furuta, N. Kawai, and D. Miyazaki. IEICE Trans. Electron., 88-C (4): 468-478 (2005)A 3-GS/s 5-bit Flash ADC with wideband input buffer amplifier.J. Matsuno, M. Hosoya, M. Furuta, and T. Itakura. VLSI-DAT, page 1-4. IEEE, (2013)20.4 A fully integrated single-chip 60GHz CMOS transceiver with scalable power consumption for proximity wireless communication.S. Saigusa, T. Mitomo, H. Okuni, M. Hosoya, A. Sai, S. Kawai, T. Wang, M. Furuta, K. Shiraishi, K. Ban and 10 other author(s). ISSCC, page 348-349. IEEE, (2014)Simultaneous Compensation of RC Mismatch and Clock Skew in Time-Interleaved S/H Circuits.Z. Liu, M. Furuta, and S. Kawahito. IEICE Trans. Electron., 89-C (6): 710-716 (2006)A Wide Bandwidth Analog Baseband Circuit for 60-GHz Proximity Wireless Communication Receiver in 65-nm CMOS.M. Furuta, H. Okuni, M. Hosoya, A. Sai, J. Matsuno, S. Saigusa, and T. Itakura. IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 98-A (2): 492-499 (2015)A 0.06mm2 8.9b ENOB 40MS/s pipelined SAR ADC in 65nm CMOS.M. Furuta, M. Nozawa, and T. Itakura. ISSCC, page 382-383. IEEE, (2010)A power supply noise cancellation scheme for a 2.24-GHz 6-bit current-steering DAC.K. Shiraishi, D. Kurose, M. Furuta, and T. Itakura. ISCAS, page 1151-1154. IEEE, (2014)A High-Speed CMOS Image Sensor with On-chip Parallel Image Compression Circuits.Y. Nishikawa, S. Kawahito, M. Furuta, and T. Tamura. CICC, page 833-836. IEEE, (2007)Neuromorphic model of hippocampus place cells using an oscillatory interference technique for hardware implementation.Z. Chen, A. Nasrallah, M. Alemohammad, M. Furuta, and R. Etienne-Cummings. Neuromorph. Comput. Eng., 2 (4): 44013 (December 2022)

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Disambiguation of "Furuta, Masanori"

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20.4 A fully integrated single-chip 60GHz CMOS transceiver with scalable power consumption for proximity wireless communication.

Please choose a person to relate this publication to

Hirokiyo Furuta

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Furuta, Masanori"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML 20.4 A fully integrated single-chip 60GHz CMOS transceiver with scalable power consumption for proximity wireless communication.

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Hirokiyo Furuta

Other publications of authors with the same name

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20.4 A fully integrated single-chip 60GHz CMOS transceiver with scalable power consumption for proximity wireless communication.