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A very efficient single-iteration oldest-out data sorter., , and . ISCAS, page 2141-2144. IEEE, (2011)The energy cost of network security: A hardware vs. software comparison., , , , and . ISCAS, page 81-84. IEEE, (2015)Achieving near-MLD performance with soft information-set decoders implemented in FPGAs., , , and . APCCAS, page 312-315. IEEE, (2010)Taking advantage of LVDS input buffers to implement sigma-delta A/D converters in FPGAs., , , , and . ISCAS (1), page 1088-1091. IEEE, (2004)An Improved GF(2) Matrix Inverter with Linear Time Complexity., , , and . ReConFig, page 322-327. IEEE Computer Society, (2010)Panning sorter: A minimal-size architecture for hardware implementation of 2D Data Sorting Coprocessors., , and . APCCAS, page 923-926. IEEE, (2010)Extraction of spatio-temporal features based on a hardware approach for a no-reference objective video quality metric., , , , , and . BMSB, page 1-4. IEEE, (2016)Analysis and Preliminary Measurements of Radiated Emissions in an Asynchronous Circuit versus its Synchronous Counterpart., , and . ReConFig, page 127-131. IEEE Computer Society, (2010)A new hardware coprocessor for accelerating Notification-Oriented applications., , , and . FPT, page 257-260. IEEE, (2012)Extraction of spatio-temporal features based on a hardware approach for a no-reference objective video quality metric., , , , , and . BMSB, page 1-4. IEEE, (2016)