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Disambiguation of "Tagliavini, Giuseppe"

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TRANSPIRE: An energy-efficient TRANSprecision floating-point Programmable archItectuRE.

, , , , , , and . DATE, page 1067-1072. IEEE, (2020)

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Giuseppe Tagliavini

Giuseppe Olivato

Giuseppe Veltri

Giuseppe Amato

Giuseppe Valenza

 

Other publications of authors with the same name

Vega: A Ten-Core SoC for IoT Endnodes With DNN Acceleration and Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 57 (1): 127-139 (2022)Source Code Classification for Energy Efficiency in Parallel Ultra Low-Power Microcontrollers., , , , and . DATE, page 878-883. IEEE, (2021)End-to-End DNN Inference on a Massively Parallel Analog In Memory Computing Architecture., , , , , , and . DATE, page 1-6. IEEE, (2023)Optimizing Self-Organizing Maps for Bacterial Genome Identification on Parallel Ultra-Low-Power Platforms., , , , and . ICECS, page 1-8. IEEE, (2023)Source Code Classification for Energy Efficiency in Parallel Ultra Low-Power Microcontrollers., , , , and . CoRR, (2020)Scalable Hierarchical Instruction Cache for Ultra-Low-Power Processors Clusters., , , , , and . CoRR, (2023)TRANSPIRE: An energy-efficient TRANSprecision floating-point Programmable archItectuRE., , , , , , and . DATE, page 1067-1072. IEEE, (2020)A transprecision floating-point platform for ultra-low power computing., , , , and . DATE, page 1051-1056. IEEE, (2018)A Mixed-Precision RISC-V Processor for Extreme-Edge DNN Inference., , , , , and . CoRR, (2020)Optimizing Random Forest-Based Inference on RISC-V MCUs at the Extreme Edge., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (11): 4516-4526 (2022)