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Accurate Polynomial Metamodeling-Based Ultra-Fast Bee Colony Optimization of a Nano-CMOS Phase-Locked Loop.

, , and . J. Low Power Electron., 8 (3): 317-328 (2012)

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Parabilis: Speeding up Single-Threaded Applications by Extracting Fine-Grained Threads for Multi-core Execution., , , , , , and . ISPDC, page 63-70. IEEE Computer Society, (2011)Kriging-Assisted Ultra-Fast Simulated-Annealing Optimization of a Clamped Bitline Sense Amplifier., , , and . VLSI Design, page 310-315. IEEE Computer Society, (2012)Fast-Accurate Non-Polynomial Metamodeling for Nano-CMOS PLL Design Optimization., , and . VLSI Design, page 316-321. IEEE Computer Society, (2012)Bee Colony Inspired Metamodeling Based Fast Optimization of a Nano-CMOS PLL., , , and . ISED, page 6-11. IEEE Computer Society, (2011)Accurate Polynomial Metamodeling-Based Ultra-Fast Bee Colony Optimization of a Nano-CMOS Phase-Locked Loop., , and . J. Low Power Electron., 8 (3): 317-328 (2012)Polynomial-metamodel assisted fast power optimization of Nano-CMOS PLL components., , , and . FDL, page 233-238. IEEE, (2012)Particle swarm optimization over non-polynomial metamodels for fast process variation resilient design of Nano-CMOS PLL., , , and . ACM Great Lakes Symposium on VLSI, page 255-258. ACM, (2012)Verilog-AMS-PAM: verilog-AMS integrated with parasitic-aware metamodels for ultra-fast and layout-accurate mixed-signal design exploration., , , and . ACM Great Lakes Symposium on VLSI, page 351-356. ACM, (2012)Fast optimization of nano-CMOS mixed-signal circuits through accurate metamodeling., , and . ISQED, page 405-410. IEEE, (2011)Metamodel-assisted ultra-fast memetic optimization of a PLL for WiMax and MMDS applications., , , and . ISQED, page 580-585. IEEE, (2012)