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High-Speed Nested Cascaded MASH Digital Delta-Sigma Modulator-Based Divider Controller.

, , and . ISCAS, page 1-5. IEEE, (2018)

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Hysteresis in electronic circuits: A circuit theorist's perspective., and . I. J. Circuit Theory and Applications, 19 (5): 471-515 (1991)Jitter Minimization in Digital PLLs with Mid-Rise TDCs., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 67-I (3): 743-752 (2020)Phenomenological study of an injection-locked CMOS LC frequency divider with direct injection., , and . ECCTD, page 480-483. IEEE, (2011)Experimental characterization of Arnold tongues in injection-locked CMOS LC frequency dividers with tail and direct injection., , and . ECCTD, page 484-487. IEEE, (2011)A "divide-by-odd number" direct injection CMOS LC injection-locked frequency divider., , and . ICECS, page 488-491. IEEE, (2012)On the statistical properties of phase noise in Fractional-N frequency synthesizers using successive requantizers., and . ICECS, page 448-451. IEEE, (2016)Observations concerning "Horn Spurs" in a MASH-based Fractional-N CP-PLL., and . ICECS, page 17-20. IEEE, (2019)The noise and spur delusion in fractional-N frequency synthesizer design., , , , , and . ISCAS, page 2577-2580. IEEE, (2015)A qualitative analysis of a complementary differential LC injection-locked frequency divider based on direct injection., and . ISCAS, page 1531-1534. IEEE, (2010)Simulation of the multipath performance of FM-DCSK digital communications using chaos., , and . ISCAS (4), page 568-571. IEEE, (1999)