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ElasticSimMATE: A fast and accurate gem5 trace-driven simulator for multicore systems.

, , , and . ReCoSoC, page 1-8. IEEE, (2017)

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An efficient hybrid power modeling approach for accurate gate-level power estimation., , , , and . ICM, page 17-20. IEEE, (2015)A Cross-Level Power Estimation Technique to Enhance High-Level Power Models Quality., , , , and . J. Low Power Electron., 13 (1): 10-28 (2017)Mont-Blanc 2020: Simulation Efforts Towards Exascale High Performance Computing : Embedded Tutorial on "DDECS-2020"., , , , and . DDECS, page 1-2. IEEE, (2020)A gem5 trace-driven simulator for fast architecture exploration of OpenMP workloads., , , and . Microprocess. Microsystems, (2019)A hybrid power modeling approach to enhance high-level power models., , , , and . DDECS, page 151-156. IEEE, (2016)A Hybrid Power Estimation Technique to improve IP power models quality., , , , and . VLSI-SoC, page 1-6. IEEE, (2016)Multilevel simulation-based co-design of next generation HPC microprocessors., , , , , , , , , and 10 other author(s). PMBS, page 18-29. IEEE, (2021)COMPESCE: A Co-design Approach for Memory Subsystem Performance Analysis in HPC Many-Cores., , , , , , , , , and 1 other author(s). ARCS, volume 13949 of Lecture Notes in Computer Science, page 105-119. Springer, (2023)