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System-level reliability exploration framework for heterogeneous MPSoC., , , and . ACM Great Lakes Symposium on VLSI, page 9-14. ACM, (2014)SI-DFA: Sub-expression integrated Deterministic Finite Automata for Deep Packet Inspection., , and . HPSR, page 164-170. IEEE, (2013)Design and analysis of layered coarse-grained reconfigurable architecture., , and . ReConFig, page 1-6. IEEE, (2012)Crack me if you can: hardware acceleration bridging the gap between practical and theoretical cryptanalysis?: a Survey., , , and . SAMOS, page 167-172. ACM, (2018)New Speed Records for Salsa20 Stream Cipher Using an Autotuning Framework on GPUs., , and . AFRICACRYPT, volume 7918 of Lecture Notes in Computer Science, page 189-207. Springer, (2013)Complexity Analysis of Reversible Logic Synthesis., , and . CoRR, (2014)Efficient and Lightweight Quantized Compressive Sensing using μ-Law., , and . ISCAS, page 1-5. IEEE, (2018)Three Snakes in One Hole: The First Systematic Hardware Accelerator Design for SOSEMANUK with Optional Serpent and SNOW 2.0 Modes., and . IEEE Trans. Computers, 65 (2): 640-653 (2016)Designing stream ciphers with scalable data-widths: a case study with HC-128., and . J. Cryptographic Engineering, 4 (2): 135-143 (2014)A Comprehensive Performance Analysis of Hardware Implementations of CAESAR Candidates., , , and . IACR Cryptology ePrint Archive, (2017)