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Real time power estimation and thread scheduling via performance counters.

, , and . SIGARCH Comput. Archit. News, 37 (2): 46-55 (2009)

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Real time power estimation and thread scheduling via performance counters., , and . SIGARCH Comput. Archit. News, 37 (2): 46-55 (2009)Accomodating Diversity in CMPs with Heterogeneous Frequencies., , and . HiPEAC, volume 5409 of Lecture Notes in Computer Science, page 248-262. Springer, (2009)Data Cache Techniques to Save Power and Deliver High Performance in Embedded Systems., , , and . Trans. High Perform. Embed. Archit. Compil., (2009)PARSEC: hardware profiling of emerging workloads for CMP design., , and . ICS, page 509-510. ACM, (2009)Understanding PARSEC performance on contemporary CMPs., , and . IISWC, page 98-107. IEEE Computer Society, (2009)An approach to resource-aware co-scheduling for CMPs., and . ICS, page 189-199. ACM, (2010)Prediction-based power estimation and scheduling for CMPs., , and . ICS, page 501-502. ACM, (2009)Optimizing thread throughput for multithreaded workloads on memory constrained CMPs., and . Conf. Computing Frontiers, page 119-128. ACM, (2008)Portable, scalable, per-core power estimation for intelligent resource management., , , , , and . Green Computing Conference, page 135-146. IEEE Computer Society, (2010)Leveraging High Performance Data Cache Techniques to Save Power in Embedded Systems., , , and . HiPEAC, volume 4367 of Lecture Notes in Computer Science, page 23-37. Springer, (2007)