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Disambiguation of "Bruguera, Javier D."

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Analysis of the Tradeoffs for the Implementation of a High-Radix Logarithm.

, , and . ICCD, page 132-137. IEEE Computer Society, (2002)

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Javier Dreyer

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High-performance VLSI architecture for the Viterbi algorithm., , , , and . IEEE Trans. Commun., 45 (2): 168-176 (1997)Parallel Architecture for Fast Transforms with Trigonometric Kernel., , , and . IEEE Trans. Parallel Distributed Syst., 5 (10): 1091-1099 (1994)Variable Latency Goldschmidt Algorithm Based on a New Rounding Method and a Remainder Estimate., and . IEEE Trans. Computers, 60 (11): 1535-1546 (2011)Leading-One Prediction with Concurrent Position Correction., and . IEEE Trans. Computers, 48 (10): 1083-1097 (1999)Parallel quadrant interlocking factorization on hypercube computers., , , and . Parallel Comput., 15 (1-3): 87-100 (1990)Adaptive Tessellation of NURBS Surfaces., , , and . WSCG, (2003)Mapping of Trellises Associated with General Encoders onto High-Performance VLSI Architectures., , , and . VLSI Signal Processing, 17 (1): 57-73 (1997)A reliability model for multiprocessor networks with degradable nodes., , and . Microprocessing and Microprogramming, 29 (1): 15-25 (1990)Multidimensional fast Hartley transform onto SIMD hypercubes., , , and . Microprocessing and Microprogramming, 29 (2): 121-134 (1990)VLSI implementation of an area-efficient architecture for the Viterbi algorithm., , and . ICASSP, page 623-626. IEEE Computer Society, (1997)