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Reliability simulation for analog ICs: Goals, solutions, and challenges., , , , , , , and . Integr., (2016)Radio-frequency inductor synthesis using evolutionary computation and Gaussian-process surrogate modeling., , , and . Appl. Soft Comput., (2017)A Comparison of Automated RF Circuit Design Methodologies: Online Versus Offline Passive Component Design., , , and . IEEE Trans. Very Large Scale Integr. Syst., 26 (11): 2386-2394 (2018)Layout-aware challenges and a solution for the automatic synthesis of radio-frequency IC blocks., , , , , , , , and . SMACD, page 1-4. IEEE, (2017)Handling the Effects of Variability and Layout Parasitics in the Automatic Synthesis of LNAs., , , , , , , , and . SMACD, page 1-164. IEEE, (2018)A detailed, cell-by-cell look into the effects of aging on an SRAM PUF using a specialized test array., , , , , and . SMACD, page 1-4. IEEE, (2023)Accurate VHDL-based simulation of Sigma-Delta modulators., , , and . ISCAS (4), page 632-635. IEEE, (2003)Improving the reliability of SRAM-based PUFs in the presence of aging., , , , , and . DTIS, page 1-6. IEEE, (2020)High-level optimization of ΣΔ modulators using multi-objetive evolutionary algorithms., , and . ISCAS, page 1494-1497. IEEE, (2016)A Versatile CMOS Transistor Array IC for the Statistical Characterization of Time-Zero Variability, RTN, BTI, and HCI., , , , , , , , , and . IEEE J. Solid State Circuits, 54 (2): 476-488 (2019)