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Bolt65 - performance-optimized HEVC HW/SW suite for Just-in-Time video processing., , , , , and . MIPRO, page 966-970. IEEE, (2019)FAUST: Design and implementation of a pipelined RISC-V vector floating-point unit., , , , , , , , and . Microprocess. Microsystems, (March 2023)JAGUAR: a high speed VLSI chip for JPEG image compression standard., and . VLSI Design, page 220-224. IEEE Computer Society, (1995)A Systolic Algorithm and Architecture for Galois Field Arithmetic., , and . IPPS, page 283-288. IEEE Computer Society, (1992)Vitruvius+: An Area-Efficient RISC-V Decoupled Vector Coprocessor for High Performance Computing Applications., , , , , , , , , and 14 other author(s). ACM Trans. Archit. Code Optim., 20 (2): 28:1-28:25 (June 2023)Thermal characterization of next-generation workloads on heterogeneous MPSoCs., , , , , , , , and . SAMOS, page 286-291. IEEE, (2017)Deeply Heterogeneous Many-Accelerator Infrastructure for HPC Architecture Exploration., , , , , , , and . PARCO, volume 32 of Advances in Parallel Computing, page 381-389. IOS Press, (2017)Enabling HPC for QoS-sensitive applications: The MANGO approach., , , , , , , , , and 6 other author(s). DATE, page 702-707. IEEE, (2016)Power consumption and bandwidth savings with video transcoding to mobile device-specific spatial resolution., , , , and . CSNDSP, page 348-352. IEEE, (2014)SIGMA: a VLSI systolic array implementation of a Galois field GF(2 m) based multiplication and division algorithm., , and . IEEE Trans. Very Large Scale Integr. Syst., 1 (1): 22-30 (1993)