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A Generic Three-Sided Rearrangeable Switching Network for Polygonal FPGA Design.

, , , and . VLSI Design, (2013)

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A Three-Stage One-Sided Rearrangeable Polygonal Switching Network., , and . IEEE Trans. Computers, 50 (11): 1291-1294 (2001)Using Wi-Fi Direct to Assist Real-Time Traffic Conditions Delivery., , , and . ICS, volume 274 of Frontiers in Artificial Intelligence and Applications, page 1710-1719. IOS Press, (2014)VLSI Implementation of 8051 MCU with In-System Programming., , , , and . ICS, volume 274 of Frontiers in Artificial Intelligence and Applications, page 308-314. IOS Press, (2014)Efficient Hardware Implementation of CORDIC-Based Symbol Detector for GSM MIMO Systems: Algorithm and Hardware Architecture., , , , , and . IEEE Access, (2022)Fast Symbol Detection for Massive G-STBC MIMO Systems., , , , , and . Wirel. Pers. Commun., 101 (1): 223-237 (2018)ARAL-CR: An adaptive reasoning and learning cognitive radio platform., , , , , , and . ICSAMOS, page 324-331. IEEE, (2010)VLSI Implementation of RISC MCU with In-Circuit Debugger., , , , , , and . ICKII, page 63-68. IEEE, (2022)FPGA Implementation of ARM MCU with Five-stage Pipeline., , , , and . ICKII, page 55-59. IEEE, (2022)Design and implementation of a low-power OFDM receiver for wireless communications., , , , and . IEEE Trans. Consumer Electronics, 58 (3): 739-745 (2012)A 900 MHz to 5.2 GHz Dual-loop Feedback Multi-band LNA., , , , , , and . ISCAS, page 1024-1027. IEEE, (2009)