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Disambiguation of "Homayoun, Houman"

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Low-Power Manycore Accelerator for Personalized Biomedical Applications.

, , , , and . ACM Great Lakes Symposium on VLSI, page 63-68. ACM, (2016)

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Houman Jalaie

Houman Alborzi

Houman Liaghati

Houman Tavassol

Homayoun Tadjadod

 

Other publications of authors with the same name

History & Variation Trained Cache (HVT-Cache): A process variation aware and fine grain voltage scalable cache with active access history monitoring., , , , and . ISQED, page 498-505. IEEE, (2012)Post-synthesis sleep transistor insertion for leakage power optimization in clock tree networks., , , , and . ISQED, page 499-507. IEEE, (2010)A fault tolerant cache architecture for sub 500mV operation: resizable data composer cache (RDC-cache)., , , and . CASES, page 251-260. ACM, (2009)Reducing Execution Unit Leakage Power in Embedded Processors., and . SAMOS, volume 4017 of Lecture Notes in Computer Science, page 299-308. Springer, (2006)A+ Tuning: Architecture+Application Auto-Tuning for In-Memory Data-Processing Frameworks., , and . ICPADS, page 163-166. IEEE, (2019)HybriDG: Hybrid Dynamic Time Warping and Gaussian Distribution Model for Detecting Emerging Zero-Day Microarchitectural Side-Channel Attacks., , , , and . ICMLA, page 604-611. IEEE, (2020)Large Language Models for Code Analysis: Do LLMs Really Do Their Job?, , , , , , , , , and 1 other author(s). CoRR, (2023)Stealthy Inference Attack on DNN via Cache-based Side-Channel Attacks., , , , , and . DATE, page 1515-1520. IEEE, (2022)Deep Multi-attributed Graph Translation with Node-Edge Co-Evolution., , , , , and . ICDM, page 250-259. IEEE, (2019)DynGraph2Seq: Dynamic-Graph-to-Sequence Interpretable Learning for Health Stage Prediction in Online Health Forums., , , and . ICDM, page 1042-1047. IEEE, (2019)