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Determination of energy and spatial distribution of oxide border traps in In0.53Ga0.47As MOS capacitors from capacitance-voltage characteristics measured at various temperatures., , , , , , , , , and 1 other author(s). Microelectron. Reliab., 54 (4): 746-754 (2014)CMOS scaling into the 21st century: 0.1 µm and beyond., , , , , , , , and . IBM J. Res. Dev., 39 (1-2): 245-260 (1995)A Review on Compact Modeling of Multiple-Gate MOSFETs., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 56-I (8): 1858-1869 (2009)Compact modeling of multiple-gate MOSFETs., , and . CICC, page 257-264. IEEE, (2008)A half-micron CMOS logic generation., , , , , , , , , and 14 other author(s). IBM J. Res. Dev., 39 (1-2): 215-228 (1995)Device scaling limits of Si MOSFETs and their application dependencies., , , , , and . Proc. IEEE, 89 (3): 259-288 (2001)Modeling and characterization of quantization, polysilicon depletion, and direct tunneling effects in MOSFETs with ultrathin oxides., , and . IBM J. Res. Dev., 43 (3): 327-338 (1999)CMOS scaling into the nanometer regime., , , , , , , , , and 1 other author(s). Proc. IEEE, 85 (4): 486-504 (1997)4- and 13-GHz tuned amplifiers implemented in a 0.1-μm CMOS technology on SOI, SOS, and bulk substrates., , , , , , and . IEEE J. Solid State Circuits, 33 (12): 2066-2073 (1998)Transistors and IC design.. Advances in Computers, (2001)