%0 Journal Article %1 journals/jssc/TakedaSAAHITNTH11 %A Takeda, Koichi %A Saito, Toshio %A Asayama, Shinobu %A Aimoto, Yoshiharu %A Kobatake, Hiroyuki %A Ito, Shinya %A Takahashi, Toshifumi %A Nomura, Masahiro %A Takeuchi, Kiyoshi %A Hayashi, Yoshihiro %D 2011 %J IEEE J. Solid State Circuits %K dblp %N 4 %P 806-814 %T Multi-Step Word-Line Control Technology in Hierarchical Cell Architecture for Scaled-Down High-Density SRAMs. %U http://dblp.uni-trier.de/db/journals/jssc/jssc46.html#TakedaSAAHITNTH11 %V 46

@article{journals/jssc/TakedaSAAHITNTH11, added-at = {2020-10-26T00:00:00.000+0100}, author = {Takeda, Koichi and Saito, Toshio and Asayama, Shinobu and Aimoto, Yoshiharu and Kobatake, Hiroyuki and Ito, Shinya and Takahashi, Toshifumi and Nomura, Masahiro and Takeuchi, Kiyoshi and Hayashi, Yoshihiro}, biburl = {https://www.bibsonomy.org/bibtex/247d0e4daecb6f7dc4c2dc282868a9be8/dblp}, ee = {https://doi.org/10.1109/JSSC.2011.2109434}, interhash = {0dbe7573162e317bd271d4c1777cacc8}, intrahash = {47d0e4daecb6f7dc4c2dc282868a9be8}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 4, pages = {806-814}, timestamp = {2020-10-27T11:40:02.000+0100}, title = {Multi-Step Word-Line Control Technology in Hierarchical Cell Architecture for Scaled-Down High-Density SRAMs.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc46.html#TakedaSAAHITNTH11}, volume = 46, year = 2011 }