%0 Conference Paper %1 conf/fpt/LiuDJ0C17 %A Liu, Zhiqiang %A Dou, Yong %A Jiang, Jingfei %A Wang, Qiang %A Chow, Paul %B FPT %D 2017 %I IEEE %K dblp %P 207-210 %T An FPGA-based processor for training convolutional neural networks. %U http://dblp.uni-trier.de/db/conf/fpt/fpt2017.html#LiuDJ0C17 %@ 978-1-5386-2656-6

@inproceedings{conf/fpt/LiuDJ0C17, added-at = {2023-09-30T00:00:00.000+0200}, author = {Liu, Zhiqiang and Dou, Yong and Jiang, Jingfei and Wang, Qiang and Chow, Paul}, biburl = {https://www.bibsonomy.org/bibtex/26696978cf21b2e640313e77cfa8c92da/dblp}, booktitle = {FPT}, crossref = {conf/fpt/2017}, ee = {https://doi.org/10.1109/FPT.2017.8280142}, interhash = {35808efcd2aa8269726bb746884e10dd}, intrahash = {6696978cf21b2e640313e77cfa8c92da}, isbn = {978-1-5386-2656-6}, keywords = {dblp}, pages = {207-210}, publisher = {IEEE}, timestamp = {2024-04-10T06:33:37.000+0200}, title = {An FPGA-based processor for training convolutional neural networks.}, url = {http://dblp.uni-trier.de/db/conf/fpt/fpt2017.html#LiuDJ0C17}, year = 2017 }