Article,
Three-Dimensional 128 Gb MLC Vertical nand Flash Memory With 24-WL Stacked Layers and 50 MB/s High-Speed Programming.
K. Park, S. Nam, D. Kim, P. Kwak, D. Lee, Y. Choi, M. Choi, D. Kwak, D. Kim, M. Kim, H. Park, S. Shim, K. Kang, S. Park, K. Lee, H. Yoon, K. Ko, D. Shim, Y. Ahn, J. Ryu, D. Kim, K. Yun, J. Kwon, S. Shin, D. Byeon, K. Choi, J. Han, K. Kyung, J. Choi, and K. Kim.IEEE J. Solid State Circuits, 50 (1): 204-213 (2015)
Meta data
- BibTeX key
- journals/jssc/ParkNKKLCCKKKPSKPLYKSARKYKSBCHKCK15
- entry type
- article
- year
- 2015
- journal
- IEEE J. Solid State Circuits
- number
- 1
- pages
- 204-213
- volume
- 50
- ee
- https://doi.org/10.1109/JSSC.2014.2352293
- url
- http://dblp.uni-trier.de/db/journals/jssc/jssc50.html#ParkNKKLCCKKKPSKPLYKSARKYKSBCHKCK15
Tags
Users
Comments and Reviewsshow / hide
Cite this publication
More citation styles
- please select -%0 Journal Article
%1 journals/jssc/ParkNKKLCCKKKPSKPLYKSARKYKSBCHKCK15
%A Park, Ki-Tae
%A Nam, Sangwan
%A Kim, Dae-Han
%A Kwak, Pansuk
%A Lee, Doosub
%A Choi, Yoon-Hee
%A Choi, Myung-Hoon
%A Kwak, Dong-Hun
%A Kim, Doo-Hyun
%A Kim, Minsu
%A Park, Hyun Wook
%A Shim, Sang-Won
%A Kang, Kyung-Min
%A Park, Sang-Won
%A Lee, Kangbin
%A Yoon, Hyun-Jun
%A Ko, Kuihan
%A Shim, Dong-Kyo
%A Ahn, Yang-Lo
%A Ryu, Jinho
%A Kim, Donghyun
%A Yun, Kyunghwa
%A Kwon, Joonsoo
%A Shin, Seunghoon
%A Byeon, Dae-Seok
%A Choi, Kihwan
%A Han, Jin-Man
%A Kyung, Kyehyun
%A Choi, Jeong-Hyuk
%A Kim, Kinam
%D 2015
%J IEEE J. Solid State Circuits
%K dblp
%N 1
%P 204-213
%T Three-Dimensional 128 Gb MLC Vertical nand Flash Memory With 24-WL Stacked Layers and 50 MB/s High-Speed Programming.
%U http://dblp.uni-trier.de/db/journals/jssc/jssc50.html#ParkNKKLCCKKKPSKPLYKSARKYKSBCHKCK15
%V 50
@article{journals/jssc/ParkNKKLCCKKKPSKPLYKSARKYKSBCHKCK15,
added-at = {2020-08-30T00:00:00.000+0200},
author = {Park, Ki-Tae and Nam, Sangwan and Kim, Dae-Han and Kwak, Pansuk and Lee, Doosub and Choi, Yoon-Hee and Choi, Myung-Hoon and Kwak, Dong-Hun and Kim, Doo-Hyun and Kim, Minsu and Park, Hyun Wook and Shim, Sang-Won and Kang, Kyung-Min and Park, Sang-Won and Lee, Kangbin and Yoon, Hyun-Jun and Ko, Kuihan and Shim, Dong-Kyo and Ahn, Yang-Lo and Ryu, Jinho and Kim, Donghyun and Yun, Kyunghwa and Kwon, Joonsoo and Shin, Seunghoon and Byeon, Dae-Seok and Choi, Kihwan and Han, Jin-Man and Kyung, Kyehyun and Choi, Jeong-Hyuk and Kim, Kinam},
biburl = {https://www.bibsonomy.org/bibtex/207f6245b5b2d67b5ec10618e4574ec15/dblp},
ee = {https://doi.org/10.1109/JSSC.2014.2352293},
interhash = {f95a28e30abb36aef532febf780bcf00},
intrahash = {07f6245b5b2d67b5ec10618e4574ec15},
journal = {IEEE J. Solid State Circuits},
keywords = {dblp},
number = 1,
pages = {204-213},
timestamp = {2020-08-31T11:41:42.000+0200},
title = {Three-Dimensional 128 Gb MLC Vertical nand Flash Memory With 24-WL Stacked Layers and 50 MB/s High-Speed Programming.},
url = {http://dblp.uni-trier.de/db/journals/jssc/jssc50.html#ParkNKKLCCKKKPSKPLYKSARKYKSBCHKCK15},
volume = 50,
year = 2015
}