%0 Journal Article %1 journals/jssc/TuWWLDKLWXY23 %A Tu, Fengbin %A Wang, Yiqi %A Wu, Zihan %A Liang, Ling %A Ding, Yufei %A Kim, Bongjin %A Liu, Leibo %A Wei, Shaojun %A Xie, Yuan %A Yin, Shouyi %D 2023 %J IEEE J. Solid State Circuits %K dblp %N 1 %P 243-255 %T ReDCIM: Reconfigurable Digital Computing- In -Memory Processor With Unified FP/INT Pipeline for Cloud AI Acceleration. %U http://dblp.uni-trier.de/db/journals/jssc/jssc58.html#TuWWLDKLWXY23 %V 58

@article{journals/jssc/TuWWLDKLWXY23, added-at = {2023-01-15T00:00:00.000+0100}, author = {Tu, Fengbin and Wang, Yiqi and Wu, Zihan and Liang, Ling and Ding, Yufei and Kim, Bongjin and Liu, Leibo and Wei, Shaojun and Xie, Yuan and Yin, Shouyi}, biburl = {https://www.bibsonomy.org/bibtex/241ad34d69ac54d2dbfa162e482cc88a6/dblp}, ee = {https://doi.org/10.1109/JSSC.2022.3222059}, interhash = {fe33a3489bf997ad107e165f6fb07e57}, intrahash = {41ad34d69ac54d2dbfa162e482cc88a6}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 1, pages = {243-255}, timestamp = {2024-04-08T10:43:52.000+0200}, title = {ReDCIM: Reconfigurable Digital Computing- In -Memory Processor With Unified FP/INT Pipeline for Cloud AI Acceleration.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc58.html#TuWWLDKLWXY23}, volume = 58, year = 2023 }