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ReDCIM: Reconfigurable Digital Computing- In -Memory Processor With Unified FP/INT Pipeline for Cloud AI Acceleration.

, , , , , , , , , and . IEEE J. Solid State Circuits, 58 (1): 243-255 (2023)

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Jintide: Utilizing Low-Cost Reconfigurable External Monitors to Substantially Enhance Hardware Security of Large-Scale CPU Clusters., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 56 (8): 2585-2601 (2021)Exploiting parallelism of imperfect nested loops with sibling inner loops on coarse-grained reconfigurable architectures., , , and . ASP-DAC, page 456-461. IEEE, (2016)Hybrid Wired/Wireless On-Chip Network Design for Application-Specific SoC., , , , and . IEICE Trans. Electron., 95-C (4): 495-505 (2012)The Implementation of Texture-Based Video Up-Scaling on Coarse-Grained Reconfigurable Architecture., , , , , and . IEICE Trans. Inf. Syst., 98-D (2): 276-287 (2015)FP-BNN: Binarized neural network on FPGA., , , , and . Neurocomputing, (2018)A 1.58 Gbps/W 0.40 Gbps/mm2 ASIC Implementation of MMSE Detection for $1288~64$ -QAM Massive MIMO in 65 nm CMOS., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 65-I (5): 1717-1730 (2018)GLMSnet: Single Channel Speech Separation Framework in Noisy and Reverberant Environments., , , , and . ASRU, page 663-670. IEEE, (2021)Atomic Dataflow based Graph-Level Workload Orchestration for Scalable DNN Accelerators., , , , and . HPCA, page 475-489. IEEE, (2022)HeteroKV: A Scalable Line-rate Key-Value Store on Heterogeneous CPU-FPGA Platforms., , , , , and . DATE, page 834-837. IEEE, (2021)Multi-CNN and decision tree based driving behavior evaluation., , , , and . SAC, page 1424-1429. ACM, (2017)