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Analytical Side Channel EM Models, Extending Simulation Abilities for ICs, and Linking Physical Models to Cryptographic Metrics., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (12): 4463-4476 (December 2023)An SRAM-Based PUF With a Capacitive Digital Preselection for a 1E-9 Key Error Probability., , , , and . IEEE Trans. Circuits Syst., 67-I (12): 4855-4868 (2020)Power Analysis Resilient SRAM Design Implemented with a 1% Area Overhead Impedance Randomization Unit for Security Applications., , , , , , , and . ESSCIRC, page 69-72. IEEE, (2019)Investigation of on-chip PLL irregularities under stress conditions - case study., , , and . ICECS, page 591-594. IEEE, (2004)Revisiting Dynamic Logic - A True Candidate for Energy-Efficient Cryogenic Operation in Nanoscaled Technologies., , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 71 (3): 987-999 (March 2024)Vulnerability of secured IoT memory against localized back side laser fault injection., , , , and . EST, page 7-11. IEEE, (2017)Silicon Proven 1.29 μm × 1.8 μm 65nm Sub-Vt Optical Sensor for Hardware Security Applications., , , and . IEEE Access, (2023)Low-Cost Side-Channel Secure Standard 6T-SRAM-Based Memory With a 1% Area and Less Than 5% Latency and Power Overheads., , , , , , , , and . IEEE Access, (2021)Gain-Cell Embedded DRAM-Based Physical Unclonable Function., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 65-I (12): 4208-4218 (2018)A Highly Reliable SRAM PUF with a Capacitive Preselection Mechanism and pre-ECC BER of 7.4E-10., , , , and . CICC, page 1-4. IEEE, (2019)