( en | de | ru )

 

Disambiguation of "Joshi, Rajiv V."

Author of the publication

copydeleteadd this publication to your clipboard
Efficient analog circuit optimization using sparse regression and error margining.

, , , , and . ISQED, page 410-415. IEEE, (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Rajiv Trehan

Rajiv Kumar

Paneerselvam Rajiv

Jidnyasa Joshi

Rajiv Shah

 

Other publications of authors with the same name

Read-disturb Detection Methodology for RRAM-based Computation-in-Memory Architecture., , , , and . AICAS, page 1-5. IEEE, (2023)A 115.1 TOPS/W, 12.1 TOPS/mm2 Computation-in-Memory using Ring-Oscillator based ADC for Edge AI., , , , , and . AICAS, page 1-5. IEEE, (2023)A Cryo-CMOS Transmon Qubit Controller and Verification with FPGA Emulation., , , , , , , , , and 14 other author(s). DATE, page 13-16. IEEE, (2022)A novel circuit topology for generating and validating digitally sense amplifier differentials for bulk and SOI., and . ESSCIRC, page 371-374. IEEE, (2005)14nm FinFET based supply voltage boosting techniques for extreme low Vmin operation., , , , and . VLSIC, page 268-. IEEE, (2015)Statistical leakage modeling for accurate yield analysis: the CDF matching method and its alternatives., , and . ISLPED, page 337-342. ACM, (2010)Mixed multi-threshold differential cascode voltage switch (MT-DCVS) circuit styles and strategies for low power VLSI design., , , , , and . ISLPED, page 263-266. ACM, (2001)"Cool low power" 1GHz multi-port register file and dynamic latch in 1.8 V, 0.25 mum SOI and bulk technology (poster session)., , , and . ISLPED, page 203-206. ACM, (2000)Data Imbalance Handling Approaches for Accurate Statistical Modeling and Yield Analysis of Memory Designs., , and . ISCAS, page 1-5. IEEE, (2019)Efficient analog circuit optimization using sparse regression and error margining., , , , and . ISQED, page 410-415. IEEE, (2016)