( en | de | ru )

 

Disambiguation of "Ohbayashi, Shigeki"

Author of the publication

copydeleteadd this publication to your clipboard
A yield improvement methodology based on logic redundant repair with a repairable scan flip-flop designed by push rule.

, , , and . ISQED, page 184-190. IEEE, (2010)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Shigeki Nagai

Shigeki Tomo

 

Other publications of authors with the same name

A 65 nm Embedded SRAM With Wafer Level Burn-In Mode, Leak-Bit Redundancy and Cu E-Trim Fuse for Known Good Die., , , , , , , , , and 8 other author(s). IEEE J. Solid State Circuits, 43 (1): 96-108 (2008)A 45-nm Bulk CMOS Embedded SRAM With Improved Immunity Against Process and Temperature Variations., , , , , , , , , and 6 other author(s). IEEE J. Solid State Circuits, 43 (1): 180-191 (2008)A 45nm Low-Standby-Power Embedded SRAM with Improved Immunity Against Process and Temperature Variations., , , , , , , , , and 6 other author(s). ISSCC, page 326-606. IEEE, (2007)A 65nm Embedded SRAM with Wafer-Level Burn-In Mode, Leak-Bit Redundancy and E-Trim Fuse for Known Good Die., , , , , , , , , and 7 other author(s). ISSCC, page 488-617. IEEE, (2007)Worst-case analysis to obtain stable read/write DC margin of high density 6T-SRAM-array with local Vth variability., , , , , , , , and . ICCAD, page 398-405. IEEE Computer Society, (2005)A yield improvement methodology based on logic redundant repair with a repairable scan flip-flop designed by push rule., , , and . ISQED, page 184-190. IEEE, (2010)